John M. Jamieson III – Principal

Mr. Jamieson has over 30 years of experience in electronics system design, system architectures, and requirements analysis.  Mr. Jamieson has significant experience in telecommunications architecture, design and development as well as embedded design with focus on high dynamic range data acquisition and data fusion systems.  He has guided the successful development and deployment of complex 10 gigabit per second data acquisition and fusion systems for the SPS-74 Periscope Detection Radar system and all iPON and iPEN Telemetry systems developments.

As a Principal in 3 Phoenix, Mr. Jamieson is responsible for Telemetry initiatives and all hardware systems architectures.  In his Business Development role, his primary focus areas include development of Small Business Innovation Research transition opportunities and expansion of new business opportunities including telemetry, imaging and radar systems business.

Prior to 3 Phoenix, Mr. Jamieson was Optical Systems Product Marketing Manager for PMC-Sierra Inc, a market leading manufacturer of telecommunication semiconductors, Mr. Jamieson provided innovative architectural and design guidance for next generation routers and switches to Cisco Systems, Alcatel Network Systems, Nortel Networks, Lucent Technologies, Siemens ICN Access Solutions Group, Tellabs, C-COR, Ciena, and Corvis.

Prior to PMC-Sierra, Mr. Jamieson was Technical Director for TAIPT Telemetry at Chesapeake Sciences Corporation.  He was responsible for the design, development, and application of standard ATM/SONET network technology for data acquisition and telemetry systems.  Specifically, Mr. Jamieson played a major role in the design and development of the TARS, Acoustic Intercept (ACI), Joint Surface Ship Torpedo Defense (JSSTD) FCT, TB-29A, Multi-Function Towed Array (MFTA), TB-16 HFTA, Total Ship Monitoring System (TSMS), Acoustic Range Arrays, Seabed Acquisition System, and Land Based telemetries, all of which used IP based ATM/SONET telemetry.

Mr. Jamieson brings a diverse background in computer hardware and software design, development, integration, and system test. Specifically his background includes:

  • Digital hardware design and development – experience in microprocessors specialized high-speed communications, multi-processors, FPGAs, ASICs, sequencers, and other programmable logic.
  • Software development – experience in structured and object oriented design, programming of real-time embedded systems using various languages, development systems, operating systems, and platforms.
  • Networking – experience with SONET, PON, Ethernet, Fiber-Channel, and ATM using different physical layers and protocols, WAN, MAN, and LAN architectures, and Internet connectivity and services.

Mr. Jamieson served on the technical staffs of PMC-Sierra Inc., Chesapeake Sciences, U.S. Design, Smart House LP, and Gould Defense Systems and holds the following patents:

#5,408,627  “Configurable Multiport Memory Interface”
#5,218,557  “Control Apparatus for Use in a Dwelling” (Home Automation Standard)
#5,642,101  “Extended Apparatus for Use in a Dwelling” (Extension of Original System)
Pending         “Passive Optical Network Based Data Fusion and Synchronization”
Pending         “Multi Sensor Fused Data Intelligent Object Detection System”

  • Johns Hopkins University, M.S., Information and Telecommunication Systems, 1997.
  • Capital College, B.S. Electrical Engineering/Physics, 1980.